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In semiconductor electronics fabrication technology, a self-aligned gate is a transistor manufacturing approach whereby the gate electrode of a MOSFET (metal–oxide–semiconductor field-effect transistor) is used as a mask for the doping of the source and drain regions. This technique ensures that the gate is naturally and precisely aligned to the edges of…
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gate transistors silicon self-aligned process aluminum technology drain mask source mos using first gates silicon-gate used wafer transistor 1968 integrated
| Subject | Predicate | Object | Confidence | Src |
|---|---|---|---|---|
| Self-aligned gate | is a | transistor manufacturing approach whereby the gate electrode of a MOSFET | 0.90 | text |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | The SGT | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | MOS | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | In | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | Tom Klein | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | Fairchild Semiconductor | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | Labs | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | Les Vadasz | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | P-type | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | N-type | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | This | 0.60 | section |
| Self-aligned gate | related to Development of the silicon-gate technology at Fairchild | Therefore | 0.60 | section |
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