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AArch64

AArch64, also known as ARM64, is a 64-bit version of the ARM architecture family, a widely used set of computer processor designs. It was introduced in 2011 with the ARMv8 architecture and later became part of the ARMv9 series. AArch64 allows processors to handle more memory and perform faster calculations than earlier 32-bit versions. It is designed to…

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ARM-A (application architecture)

44 related topics

Overview

18 related topics

AArch64 Execution state

8 related topics

Key facts & relationships

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Encoding
AArch64/A64 and AArch32/A32 use 32-bit instructions, AArch32/T32 (Thumb-2) uses mixed 16- and 32-bit instructions
Endianness
Bi for data only (little as default, instructions are little)
Extensions
SVE, SVE2, SME, AES, SM3, SM4, SHA, CRC32, RNDR, TME · Mandatory: Thumb-2, Neon, VFPv4-D16, VFPv4 · Obsolete: Jazelle
Floating-point
32 × 128-bit registers for scalar 32- and 64-bit FP or SIMD FP or integer; or cryptography
General-purpose
31 × 64-bit integer registers
Introduced
2011; 15 years ago (2011)

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Overview

AArch64 Execution state

ARM-A (application architecture)

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Map overview Semantic statistics

AArch64

Nodes74
Edges73
Triples130
Avg. degree1.97
Density0.027027
Components1

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AArch64

Top relations

related to ARM-A (application architecture) · 38
AArch64 → A32, A64, AArch32, AES, An ARMv8-A, An ARMv9-A, Announced, Apple, AppliedMicro, ARM, ARM Cortex-A32, ARM Cortex-A34, ARM Cortex-A72, ARMv7-A, ARMv8-A, ARMv8-A SoC, Cortex-A53, Cortex-A57, Cyclone, EL0
related to ARMv8.7-A and ARMv9.2-A · 20
AArch64 → ARMv8, ARMv9, Atomic, Branch-Record, Call Stack Recorder, Enhanced, In September, Its, Load/store/insert/extract, Matrix, On-the-fly, PCIe, Scalable Matrix Extension, SME, Streaming, SVE, Wait For Event, Wait For Interrupt, WFE, WFI
related to ARMv8.3-A · 18
AArch64 → AArch32, Advanced SIMD, ARMv8, C11, Floating-point JavaScript Convert, ID, In October, Its, Nested, New FJCVTZS, NOP, PAC, Pointer, QARMA, RCpc, Release Consistent, Signed, Zero
related to ARMv8.5-A and ARMv9.0-A · 14
AArch64 → ARMv8, ARMv8-A, Branch Target Indicators, BTI, Deterministic, In September, International Standards, Its, Like, Memory Tagging Extension, MTE, National, Random Number Generator, True Random Numbers
related to ARMv8.8-A and ARMv9.3-A · 9
AArch64 → ARMv8, ARMv9, Enhancements, Hinted, In September, Instructions, Non-maskable, PAC, Their
related to AArch64 Execution state · 8
AArch64 → AArch32, ARM, ARMv8-R, ARMv9-A, Execution, In ARMv8-A, These, This
related to Naming conventions · 8
AArch64 → A32, A6432-bit, AArch32Instruction, AArch64Instruction, ARMv8-R, Cortex-A32, Execution, T32Example
related to ARM-R (real-time architecture) · 6
AArch64 → A64, Arm, Armv8-R, Cortex-R82, It, Optional AArch64
Extensions · 3
AArch64 → Mandatory: Thumb-2, Neon, VFPv4-D16, VFPv4, Obsolete: Jazelle, SVE, SVE2, SME, AES, SM3, SM4, SHA, CRC32, RNDR, TME
Encoding · 1
AArch64 → AArch64/A64 and AArch32/A32 use 32-bit instructions, AArch32/T32 (Thumb-2) uses mixed 16- and 32-bit instructions

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Important terminology

armv8 support instructions memory architecture aarch32 announced enhancements armv9 extension arm armv8-a instruction sve 32-bit neon simd set state extensions

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
AArch64EncodingAArch64/A64 and AArch32/A32 use 32-bit instructions, AArch32/T32 (Thumb-2) uses mixed 16- and 32-bit instructions1.00infobox
AArch64EndiannessBi for data only (little as default, instructions are little)1.00infobox
AArch64ExtensionsSVE, SVE2, SME, AES, SM3, SM4, SHA, CRC32, RNDR, TME1.00infobox
AArch64ExtensionsMandatory: Thumb-2, Neon, VFPv4-D16, VFPv41.00infobox
AArch64ExtensionsObsolete: Jazelle1.00infobox
AArch64Floating-point32 × 128-bit registers for scalar 32- and 64-bit FP or SIMD FP or integer; or cryptography1.00infobox
AArch64General-purpose31 × 64-bit integer registers1.00infobox
AArch64Introduced2011; 15 years ago (2011)1.00infobox
AArch64VersionARMv8-A, ARMv8-R, ARMv9-A1.00infobox
AArch64related to AArch64 Execution stateIn ARMv8-A0.60section
AArch64related to AArch64 Execution stateARMv8-R0.60section
AArch64related to AArch64 Execution stateARMv9-A0.60section

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