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Instruction set architecture

An instruction set architecture (ISA) is an abstract model that defines the programmable interface of the CPU of a computer, defining how software interacts with hardware. A device (i.e. CPU) that interprets instructions described by an ISA is an implementation of that ISA. Generally, the same ISA is used for a family of related CPU devices.

Products, Instructions & Instruction set implementation

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Overview

Classification of ISAs

Instructions

Design

Instruction set implementation

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Map overview Semantic statistics

Instruction set architecture

Nodes167
Edges166
Triples44
Avg. degree1.99
Density0.011976
Components1

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Instruction set architecture

Top relations

related to overview · 9
Instruction set architecture → AMD Athlon, An, For, Fred Brooks, IBM, Intel Pentium, Processors, System/360, The
related to External links · 7
Instruction set architecture → Bowen's Instruction Summary CardsMark, Instruction, Media, Page, Smotherman's Historical Computer Designs, Wikimedia CommonsProgramming Textfiles, Wiktionary-logo-en-v2
see also · 3
Instruction set architecture → APIsProcessor, Comparison, RTL

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Important terminology

instruction instructions set memory registers risc isa code register cisc machine bneeds one operands may data architectures store two machines

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
addressing modesinstance ofand the programming interface for managing main memory0.80text
virtual memoryinstance ofand the programming interface for managing main memory0.80text
and memory consistency mechanismsinstance ofand the programming interface for managing main memory0.80text
performanceinstance ofThis enables multiple implementations of an ISA that differ in characteristics0.80text
physical sizeinstance ofThis enables multiple implementations of an ISA that differ in characteristics0.80text
and monetary costinstance ofThis enables multiple implementations of an ISA that differ in characteristics0.80text
Smalltalkinstance ofNone of the five engineering design teams could count on being able to bring about adjustments in architectural specifications as a way of easing difficulties in achieving cost…0.80text
the Java virtual machineinstance ofNone of the five engineering design teams could count on being able to bring about adjustments in architectural specifications as a way of easing difficulties in achieving cost…0.80text
and Microsoft's Common Language Runtimeinstance ofNone of the five engineering design teams could count on being able to bring about adjustments in architectural specifications as a way of easing difficulties in achieving cost…0.80text
implement this by translating the bytecode for commonly used code paths into native machine codeinstance ofNone of the five engineering design teams could count on being able to bring about adjustments in architectural specifications as a way of easing difficulties in achieving cost…0.80text
logarithminstance ofor transcendental functions0.80text
sineinstance ofor transcendental functions0.80text

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