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UML state machine

UML state machine, formerly known as UML statechart, is an extension of the mathematical concept of a finite automaton in computer science applications as expressed in the Unified Modeling Language (UML) notation.

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Overview

Basic state machine concepts

UML extensions to the traditional FSM formalism

The limitations of UML state machines

Advanced semantic analysis

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Map overview Semantic statistics

UML state machine

Nodes31
Edges30
Triples62
Avg. degree1.94
Density0.064516
Components1

How this topic connects Entity context

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UML state machine

Top relations

related to UML extensions to the traditional FSM formalism · 12
UML state machine → Clear, Due, For, FSM, FSMs, Obviously, Off, They, This, Though, UML, What's
related to Hierarchically nested states · 10
UML state machine → Figure, FSMs, However, HSMs, If, Of, States, The, This, UML
related to Extended states · 9
UML state machine → Another, Extended, For, FSM, In, Indeed, State, This, UML
related to Run-to-completion execution model · 9
UML state machine → All, During, In, New, RTC, The RTC, These, This, UML
related to The limitations of UML state machines · 9
UML state machine → Any, English, Harel, However, In, Java, The, The UML, UML
related to Event deferral · 7
UML state machine → Consistent, If, In, It, Sometimes, UML, Upon
is a · 1
UML state machine → object-based variant of Harel statechart

Important terminology Word statistics

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Important terminology

state event uml machine states actions transition machines transitions system exit entry figure example internal orthogonal however extended regions target

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
UML state machineis aobject-based variant of Harel statechart0.90text
a mouse clickinstance ofwhich means that they continuously wait for the occurrence of some external or internal event0.80text
a button pressinstance ofwhich means that they continuously wait for the occurrence of some external or internal event0.80text
a time tickinstance ofwhich means that they continuously wait for the occurrence of some external or internal event0.80text
or an arrival of a data packetinstance ofwhich means that they continuously wait for the occurrence of some external or internal event0.80text
Cinstance ofexpressions in an implementation language0.80text
UML state machinerelated to Event deferralSometimes0.60section
UML state machinerelated to Event deferralIn0.60section
UML state machinerelated to Event deferralUML0.60section
UML state machinerelated to Event deferralIf0.60section
UML state machinerelated to Event deferralUpon0.60section
UML state machinerelated to Event deferralIt0.60section

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