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TILE64 is a VLIW ISA multicore processor manufactured by Tilera. It consists of a mesh network of 64 "tiles", where each tile houses a general purpose processor, cache, and a non-blocking router, which the tile uses to communicate with the other tiles on the processor.
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tilera cores processor vliw cache tile core two 90 nm 600 900 mhz multicore cpu isa router register ddr2 ethernet
| Subject | Predicate | Object | Confidence | Src |
|---|---|---|---|---|
| TILE64 | Common manufacturer | Tilera | 1.00 | infobox |
| TILE64 | Cores | 64 | 1.00 | infobox |
| TILE64 | Launched | 2007 | 1.00 | infobox |
| TILE64 | Max. CPU clock rate | 600 MHz to 900 MHz | 1.00 | infobox |
| TILE64 | Technology node | 45 nm to 90 nm | 1.00 | infobox |
| TILE64 | is a | VLIW ISA multicore processor manufactured by Tilera | 0.90 | text |
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