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In a central processing unit (CPU), a status register, flag register, or condition code register (CCR) is a register that stores flags (bits) indicating the processor state and results of operations. Examples of such registers include the FLAGS register in x86 CPUs, the program status word (PSW) register in IBM's System/360 through z/Architecture, the…
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register status flags instructions program instruction may processor result flag information bits bit test word value registers architectures mips interrupt
| Subject | Predicate | Object | Confidence | Src |
|---|---|---|---|---|
| privilege flags | instance of | Such machines either do not pass implicit status information between instructions or pass it in a general purpose register.A status register may have additional fields | 0.80 | text |
| interrupt enable bits | instance of | Such machines either do not pass implicit status information between instructions or pass it in a general purpose register.A status register may have additional fields | 0.80 | text |
| and other types of information | instance of | Such machines either do not pass implicit status information between instructions or pass it in a general purpose register.A status register may have additional fields | 0.80 | text |
| these | instance of | the status register might contain flags | 0.80 | text |
| Status register | related to Common flags | Here | 0.60 | section |
| Status register | related to Common flags | CPU | 0.60 | section |
| Status register | related to Other flags | On | 0.60 | section |
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