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POWER5

The POWER5 is a microprocessor developed and fabricated by IBM. It is an improved version of the POWER4. The principal improvements are support for simultaneous multithreading (SMT) and an on-die memory controller. The POWER5 is a dual-core microprocessor, with each core supporting one physical thread and two logical threads, for a total of two physical…

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Cores
2
Designed by
IBM
Instruction set
PowerPC 2.02
L1 cache
32+32 KB/core
L2 cache
1.875 MB/chip
L3 cache
36 MB/chip (off-chip)

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Description

Products

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POWER5

Nodes35
Edges34
Triples108
Avg. degree1.94
Density0.057143
Components1

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POWER5

Top relations

related to References · 37
POWER5 → Ashlee, Balaram, Clabes, Conference, December, Design, Development, Dual-Core Multithreaded Processor, Glaskowsky, IBM, IBM Journal, IBM Power5 Chip, IBM Previews Power5, IBM Raises Curtain, IEEE International Solid-State Circuits, IEEE Micro, Implementation, Joachim, Joel, Kalla
related to Products · 15
POWER5 → DCM, DCM POWER5, DS8000, Escala, Groupe Bull, Hitachi, IBM, Infoprint, IntelliStation POWER, MCM POWER5, QCM, SR11000, System, Third-party, TOP500
related to Description · 11
POWER5 → As, Its, L2, L3, Like, MB, Most, POWER4, SMT, The, The POWER5
related to history · 11
POWER5 → Fujitsu SPARC64, Hot Chips, IBM, Intel Itanium, It, Microprocessor Forum, October, Sun Microsystems UltraSPARC IV, Systems, Technical, The POWER5
related to External links · 9
POWER5 → Cluster, DDN S2A9550 Storage, High-Performance IBM Power5, Montecito, POWER4, Sizing, Super Heavyweights, Texas, University
related to POWER5+ · 9
POWER5 → Clock, February, GHz, Improvements, July, October, On, The POWER5, This
is a · 3
POWER5 → dual-core microprocessor, further development of the POWER4, microprocessor developed and fabricated by IBM
Cores · 1
POWER5 → 2
Designed by · 1
POWER5 → IBM
Instruction set · 1
POWER5 → PowerPC 2.02

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Important terminology

ibm microprocessor power4 cache two increased l3 mcm 2003 die microprocessors one multithreading clock ghz chip core thread october 2004

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
POWER5Cores21.00infobox
POWER5Designed byIBM1.00infobox
POWER5Instruction setPowerPC 2.021.00infobox
POWER5L1 cache32+32 KB/core1.00infobox
POWER5L2 cache1.875 MB/chip1.00infobox
POWER5L3 cache36 MB/chip (off-chip)1.00infobox
POWER5Launched20041.00infobox
POWER5Max. CPU clock rate1.5 GHz to 2.3 GHz1.00infobox
POWER5PredecessorPOWER41.00infobox
POWER5SuccessorPOWER61.00infobox
POWER5Technology node130 nm to 90 nm1.00infobox
POWER5is amicroprocessor developed and fabricated by IBM0.90text
POWER5is adual-core microprocessor0.90text
POWER5is afurther development of the POWER40.90text

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