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POWER4

The POWER4 is a microprocessor developed by International Business Machines (IBM) that implemented the 64-bit PowerPC and PowerPC AS instruction set architectures. Released in 2001, the POWER4 succeeded the POWER3 and RS64 microprocessors, enabling RS/6000 and eServer iSeries models of AS/400 computer servers to run on the same processor, as a step…

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Cores
2
Designed by
IBM
Instruction set
PowerPC (PowerPC v.2.00/01)
L1 cache
64+32 kB/core
L2 cache
1.41 MB/chip
L3 cache
32 MB off chip

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Overview

Functional layout

Multi-chip configuration

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Map overview Semantic statistics

POWER4

Nodes22
Edges21
Triples83
Avg. degree1.91
Density0.090909
Components1

How this topic connects Entity context

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POWER4

Top relations

related to References · 31
POWER4 → Anderson, Archived, Clabes, Development, Dodson, Fields, IBM, IBM Journal, IBM's Power4 Unveiling Continues, ISSN, Jr, Keaty, Kircher, Krauter, Le, Memory Bandwidth, Microprocessor Report, November, October, PDF
related to Functional layout · 24
POWER4 → BIST, Built In Self Test, CIU, Each, First Failure Data Capture, GX, I/O, L1/L2, L2, L3, NC, Performance Monitoring Unit, PMU, POR, Power-on, POWER4 MCM's, The Core Interface Unit, The Fabric Controller, The GX, The Non-Cacheable
related to Execution units · 8
POWER4 → BR, CR, FP1-2, FX1-2, LD1-2, The POWER4, These, They
related to Multi-chip configuration · 4
POWER4 → L3 ECC, MB, MCM, The POWER4
related to POWER4+ · 4
POWER4 → GHz, It, SOI CMOS, The POWER4
Cores · 1
POWER4 → 2
Designed by · 1
POWER4 → IBM
Instruction set · 1
POWER4 → PowerPC (PowerPC v.2.00/01)
L1 cache · 1
POWER4 → 64+32 kB/core
L2 cache · 1
POWER4 → 1.41 MB/chip

Important terminology Word statistics

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Important terminology

two microprocessor ibm instruction powerpc unit cache first execution units l2 clock ghz power3 rs64 controller microarchitecture also l3 set

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
POWER4Cores21.00infobox
POWER4Designed byIBM1.00infobox
POWER4Instruction setPowerPC (PowerPC v.2.00/01)1.00infobox
POWER4L1 cache64+32 kB/core1.00infobox
POWER4L2 cache1.41 MB/chip1.00infobox
POWER4L3 cache32 MB off chip1.00infobox
POWER4Launched20011.00infobox
POWER4Max. CPU clock rate1.1 GHz to 1.9 GHz1.00infobox
POWER4PredecessorsPOWER3, RS641.00infobox
POWER4SuccessorPOWER51.00infobox
POWER4Technology node180 nm to 130 nm1.00infobox
POWER4is amicroprocessor developed by International Business Machines0.90text

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    Min side: 3
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