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IA-64 (Intel Itanium architecture) is the instruction set architecture (ISA) of the discontinued Itanium family of 64-bit Intel microprocessors. The basic ISA specification originated at Hewlett-Packard (HP), and was subsequently implemented by Intel in collaboration with HP. The first Itanium processor, codenamed Merced, was released in 2001.
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instruction itanium architecture instructions intel processor registers cache execute hp also execution data support floating-point per isa compiler set cycle
| Subject | Predicate | Object | Confidence | Src |
|---|---|---|---|---|
| IA-64 | Bits | 64-bit | 1.00 | infobox |
| IA-64 | Branching | Condition register | 1.00 | infobox |
| IA-64 | Design | EPIC | 1.00 | infobox |
| IA-64 | Designer | HP and Intel | 1.00 | infobox |
| IA-64 | Encoding | Fixed | 1.00 | infobox |
| IA-64 | Endianness | Selectable | 1.00 | infobox |
| IA-64 | Floating-point | 128 | 1.00 | infobox |
| IA-64 | General-purpose | 128 (64 bits plus 1 trap bit; 32 are static, 96 use register windows); 64 1-bit predicate registers | 1.00 | infobox |
| IA-64 | Introduced | 2001 | 1.00 | infobox |
| IA-64 | Type | Load–store | 1.00 | infobox |
| itself to develop proprietary microprocessors | instance of | HP had begun to believe that it was no longer cost-effective for individual enterprise systems companies | 0.80 | text |
| Linux | instance of | Unix and Unix-like systems | 0.80 | text |
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