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Boundary scan

Boundary scan is a method for testing interconnects (wire lines) on printed circuit boards or sub-blocks inside an integrated circuit (IC). Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage, or analyze sub-blocks inside an integrated circuit.

History, Testing & Debugging

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Overview

Testing

Debugging

History

Advanced semantic analysis

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Map overview Semantic statistics

Boundary scan

Nodes28
Edges27
Triples53
Avg. degree1.93
Density0.071429
Components1

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Boundary scan

Top relations

related to Board test infrastructure · 11
Boundary scan → Arbitrary, Boundary-scan, BSDL, CAD/EDA, Common, DDR, DRAM, JTAG, Scan-path, SRAM, Typically
related to On-chip infrastructure · 10
Boundary scan → BSR, IC, JTAG, JTAG Test Access Port, On-chip, Some TAP, TAP, These, This, To
related to JTAG test operations · 9
Boundary scan → Among, Boundary Scan Register, BSDL, BSR, By, Devices, However, The, These
related to External links · 6
Boundary scan → Book Boundary, Boundary Scan Tutorial, JTAG, Official IEEE, Standards Development Group WebsiteIEEE, TAP
related to Test mechanism · 4
Boundary scan → As, Boundary, By, The
related to Testing · 4
Boundary scan → Each, If, JTAG, The
related to Debugging · 3
Boundary scan → JTAG Test Access Port, TAP, The
is a · 1
Boundary scan → method for testing interconnects

Important terminology Word statistics

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Important terminology

scan boundary test jtag testing board logic pin also device circuit bsdl cells access devices external ieee signal support set

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
Boundary scanis amethod for testing interconnects0.90text
in-system programming of various types of flash memoryinstance ofsuch systems also support non-test but affiliated applications0.80text
open circuitsinstance ofThey can include diagnostic options to accurately pin-point faults0.80text
shortsinstance ofThey can include diagnostic options to accurately pin-point faults0.80text
may also offer schematic or layout viewers to depict the fault in a graphical mannerinstance ofThey can include diagnostic options to accurately pin-point faults0.80text
in-circuit testersinstance ofTests developed with such tools are frequently combined with other test systems0.80text
Boundary scanrelated to Board test infrastructureTypically0.60section
Boundary scanrelated to Board test infrastructureJTAG0.60section
Boundary scanrelated to Board test infrastructureCAD/EDA0.60section
Boundary scanrelated to Board test infrastructureBSDL0.60section
Boundary scanrelated to Board test infrastructureCommon0.60section
Boundary scanrelated to Board test infrastructureScan-path0.60section

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    Min side: 3
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