Blackfin

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Architecture features

ALUs Accumulators Barrel shifter Optimization Compiler

43 related topics

Peripherals

CAN Ethernet Media Access Controller MII RMII

23 related topics

Development tools

Toolchains IDE Eclipse CDT Green Hills Software GCC

7 related topics

Architecture details

32-bit RISC SIMD Intel SHARC

6 related topics

Key facts & relationships

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Bits: 32-bit
Branching: Condition code
Design: RISC
Designer: Analog Devices
Encoding: Variable (16- or 32-bit general purpose, or 64-bit parallel issue of 1 × 32-bit instruction + 2 × 16-bit instructions)
Endianness: Little

Topics to explore

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Overview

Microprocessors Microprocessor
Analog Devices
Digital signal processor
Multiply–accumulates Multiply–accumulate
Microcontroller
Low-power processor
Operating systems Operating system
Real-time Real-time computer graphics
H.264
Video encoding

Architecture details

32-bit
RISC
SIMD
Intel
SHARC Super Harvard Architecture Single-Chip Computer
XScale

Architecture features

ALUs Arithmetic logic unit
Accumulators Accumulator (computing)
Barrel shifter
Optimization Compiler optimization
Compiler
Programmer
Zero-overhead loops Zero-overhead looping
Instructions Instruction set
Opcodes Opcode
ISA Instruction Set Architecture
Expressiveness Expressive power (computer science)
Byte-addressable
Memory map
Control registers Control register
Von Neumann architecture
SRAM Shadow Random Access Memory
Harvard architecture
Throughput
SDRAM
DDR-SDRAM
NOR flash
NAND flash
SRAM Static random-access memory
ATAPI
SD/SDIO
DMA Direct memory access
Peripherals Peripheral
DMA channel
Memory protection unit
RTOSs RTOS

Peripherals

CAN Controller Area Network
Ethernet
Media Access Controller Media access control
MII Media-independent interface
RMII
GPIO
I2C
MOST Media Oriented Systems Transport
PPI Parallel Peripheral Interface
PWM Pulse-width modulation
Real-time clock
SPI Serial Peripheral Interface
TDM Time-division multiplexing
I2S
ADCs Analog-to-digital converter
DACs Digital-to-analog converter
UART
RS-232
MIDI
IRDA Infrared Data Association
USB 2.0 OTG (On-The-Go) USB On-The-Go
Watchdog timer
Memory-mapped Memory-mapped I/O

Development tools

Toolchains Toolchain
IDE Integrated development environment
Eclipse CDT Eclipse (software)
Green Hills Software
GCC GNU Compiler Collection
National Instruments
LabVIEW

Supported operating systems, RTOSs and kernels

Linux

Advanced semantic analysis

Deeper signals for content research, entity SEO and topical coverage. The plain-language headings explain what each technical view is useful for.

Map overview Semantic statistics

Nodes97

Edges96

Triples140

Avg. degree1.98

Density0.020619

Components1

How this topic connects Entity context

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Blackfin

Top relations

related to Peripherals · 41

Blackfin → ADCs, ATAPICAN, CCDs, CMOS, DACs, DDR1, DDR2, DMA, DMAEMAC, EBIU, EPROM, Ethernet Media Access Controller, External Bus Interface Unit, FPGAs, I/O, IRDA, I²S, LCDs, LPDDR, MHz

related to Development tools · 27

Blackfin → ADI, BF50x, BF51x, BF52x, BF547, BF561, BF566, BF59x, BF5xx, BF6xx, BF7xx, CrossCore Embedded Studio, Eclipse CDT, GCC, GNU GCC Toolchain, Green Hills MULTI, Green Hills Software's MULTI, However, IDE, Moreover

related to Microcontroller features · 17

Blackfin → All Blackfin, Although, Blackfin MPU, CPU, I/O, MMU, MPU, NOMMU Linux, OS-II, QNX, RTOSs, The, The MPU, These, This, ThreadX, WinCE

related to Core features · 13

Blackfin → ALUs, DAGs, DSP, For, MAC, MACs, Other, RISC, The, The ISA, This, Two, What

related to Architecture details · 10

Blackfin → Analog Devices, December, Embedded Systems Conference, Intel, June, Micro Signal Architecture, MSA, RISC, SIMD, The

related to Memory and DMA · 9

Blackfin → Harvard, Instruction, Internal L1, L1, L2, SRAM, The Blackfin, The L1, Von Neumann

related to External links · 4

Blackfin → BlackfinT2 SDE, Linux, Open, Processor Programming Referenceblackfin

related to Supported operating systems, RTOSs and kernels · 4

Blackfin → April, Linux, NOMMU, Several

Bits · 1

Blackfin → 32-bit

Branching · 1

Blackfin → Condition code

Important terminology Word statistics

Use these terms to understand the vocabulary surrounding the topic, not as a checklist for keyword stuffing.

Important terminology

memory processors support architecture processor 32-bit operating instructions systems designed core dsp peripherals features external instruction data devices microcontroller used

Entity relationships Subject–Predicate–Object triples

Subject	Predicate	Object	Confidence	Src
Blackfin	Bits	32-bit	1.00	infobox
Blackfin	Branching	Condition code	1.00	infobox
Blackfin	Design	RISC	1.00	infobox
Blackfin	Designer	Analog Devices	1.00	infobox
Blackfin	Encoding	Variable (16- or 32-bit general purpose, or 64-bit parallel issue of 1 × 32-bit instruction + 2 × 16-bit instructions)	1.00	infobox
Blackfin	Endianness	Little	1.00	infobox
Blackfin	General-purpose	8 × 32-bit data registers (addressable as 16 × 16-bit half-registers), 2 × 40-bit accumulators, 6 × 32-bit address registers, stack pointer, frame pointer	1.00	infobox
Blackfin	Introduced	2000; 26 years ago (2000)	1.00	infobox
Blackfin	Type	Load–store	1.00	infobox
Blackfin	is a	family of hybrid 16/32-bit microprocessors developed	0.90	text
real-time H.264 video encoding	instance of	It was designed for a unified low-power processor architecture that can run operating systems while simultaneously handling complex numeric tasks	0.80	text
ATAPI	instance of	Some Blackfin processors also include mass-storage interfaces	0.80	text

Related concept clusters Concept neighborhoods

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Connections between topic areas Semantic bridges

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Min side: 3