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VIA C7

The VIA C7 is an x86 central processing unit designed by Centaur Technology and sold by VIA Technologies.

History, Measurement & Technology

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Explore the main themes, entities and connections around VIA C7. Start with the topic map, then use the sections below for research and deeper semantic analysis.

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Product history

14 related topics

CPU cores

11 related topics

Design choices

1 related topics

Overview

4 related topics

Key facts & relationships

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Common manufacturer
VIA Technologies
Core name
Esther (C5J)
Cores
1
Extensions
MMX, SSE, SSE2, SSE3, PadLock (AES, RNG, SHA, PMM)
FSB speeds
400 MT/s to 800 MT/s
Instruction set
x86-16, IA-32

Topics to explore

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Overview

Product history

CPU cores

Design choices

Advanced semantic analysis

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Map overview Semantic statistics

VIA C7

Nodes35
Edges34
Triples36
Avg. degree1.94
Density0.057143
Components1

How this topic connects Entity context

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VIA C7

Top relations

related to External links · 16
VIA C7 → An, Analysis, Archived, Englishhttp, EPIA EN15000, Part, ProcessorVIA C7-M ProcessorDetailed Platform, Review, RightMark Memory Analyzer, Smith, Van, VIA, VIA Arena, VIA C7 ProcessorVIA C7, VIA C7-M, VIA C7/C7-M Processors
see also · 4
VIA C7 → AtomNetbook, List, VIA, VIA Eden
Sockets · 2
VIA C7 → nanoBGA2 400, Socket 479
Common manufacturer · 1
VIA C7 → VIA Technologies
Core name · 1
VIA C7 → Esther (C5J)
Cores · 1
VIA C7 → 1
Extensions · 1
VIA C7 → MMX, SSE, SSE2, SSE3, PadLock (AES, RNG, SHA, PMM)
FSB speeds · 1
VIA C7 → 400 MT/s to 800 MT/s
Instruction set · 1
VIA C7 → x86-16, IA-32
L1 cache · 1
VIA C7 → 64 KiB instruction + 64 KiB data

Important terminology Word statistics

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Important terminology

via c7 c7-m core c3 ghz processor clock cache esther technology cpu cores based design may 400 set technologies sse2

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
VIA C7Common manufacturerVIA Technologies1.00infobox
VIA C7Core nameEsther (C5J)1.00infobox
VIA C7Cores11.00infobox
VIA C7ExtensionsMMX, SSE, SSE2, SSE3, PadLock (AES, RNG, SHA, PMM)1.00infobox
VIA C7FSB speeds400 MT/s to 800 MT/s1.00infobox
VIA C7Instruction setx86-16, IA-321.00infobox
VIA C7L1 cache64 KiB instruction + 64 KiB data1.00infobox
VIA C7L2 cache128 KiB 32-way exclusive1.00infobox
VIA C7LaunchedMay 20051.00infobox
VIA C7Max. CPU clock rate1.0 GHz to 2.0 GHz1.00infobox
VIA C7PredecessorVIA C31.00infobox
VIA C7SocketsSocket 4791.00infobox
VIA C7SocketsnanoBGA2 4001.00infobox
VIA C7SuccessorVIA Nano1.00infobox
VIA C7Technology node90nm1.00infobox
VIA C7is ax86 central processing unit designed by Centaur Technology and sold by VIA Technologies0.90text

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