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Bonnell is a CPU microarchitecture used by Intel Atom processors which can execute up to two instructions per cycle. Like many other x86 microprocessors, it translates x86 instructions (CISC instructions) into simpler internal operations (sometimes referred to as micro-ops, effectively RISC style instructions) prior to execution. The majority of…
Measurement, First generation cores & Second generation cores
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| Subject | Predicate | Object | Confidence | Src |
|---|---|---|---|---|
| Bonnell (microarchitecture) | Common manufacturer | Intel | 1.00 | infobox |
| Bonnell (microarchitecture) | Core names | Silverthorne | 1.00 | infobox |
| Bonnell (microarchitecture) | Core names | Diamondville | 1.00 | infobox |
| Bonnell (microarchitecture) | Core names | Pineview | 1.00 | infobox |
| Bonnell (microarchitecture) | Core names | Tunnel Creek | 1.00 | infobox |
| Bonnell (microarchitecture) | Core names | Lincroft | 1.00 | infobox |
| Bonnell (microarchitecture) | Core names | Stellarton | 1.00 | infobox |
| Bonnell (microarchitecture) | Core names | Sodaville | 1.00 | infobox |
| Bonnell (microarchitecture) | Core names | Cedarview | 1.00 | infobox |
| Bonnell (microarchitecture) | Cores | 1, 2 | 1.00 | infobox |
| Bonnell (microarchitecture) | Discontinued | 2013 | 1.00 | infobox |
| Bonnell (microarchitecture) | Extensions | SSE, SSE2, SSE3, SSSE3 | 1.00 | infobox |
| Bonnell (microarchitecture) | FSB speeds | 400 MHz to 667 MHz | 1.00 | infobox |
| Bonnell (microarchitecture) | Instruction set | x86-16, IA-32, x86-64 (some) | 1.00 | infobox |
| Bonnell (microarchitecture) | Instructions | MMX | 1.00 | infobox |
| Bonnell (microarchitecture) | Launched | 2008 | 1.00 | infobox |
| Bonnell (microarchitecture) | Max. CPU clock rate | 600 MHz to 2.13 GHz | 1.00 | infobox |
| Bonnell (microarchitecture) | Package | 441-ball µFCBGA | 1.00 | infobox |
| Bonnell (microarchitecture) | Successor | Silvermont | 1.00 | infobox |
| Bonnell (microarchitecture) | Technology node | 45 nm to 32 nm | 1.00 | infobox |
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