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OR gate

The OR gate is a digital logic gate that implements logical disjunction. The OR gate outputs "true" if any of its inputs is "true"; otherwise it outputs "false". The input and output states are normally represented by different voltage levels.

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Description

11 related topics

Symbols

5 related topics

Implementations

5 related topics

Hardware description and pinout

4 related topics

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Overview

Description

Symbols

Hardware description and pinout

Implementations

Wired-OR

Advanced semantic analysis

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Map overview Semantic statistics

OR gate

Nodes37
Edges36
Triples39
Avg. degree1.95
Density0.054054
Components1

How this topic connects Entity context

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OR gate

Top relations

related to Hardware description and pinout · 9
OR gate → CMOS, CMOS IC, CMOS ICs, In, OR, The, The TTL, There, TTL
related to Description · 8
OR gate → AND, Any OR, Equivalently, In, It, OR, The, Thus
related to Symbols · 8
OR gate → American, ANSI, European, IEC, OR, The, The DIN, There
related to OR gates with many inputs · 6
OR gate → CMOS, More, NAND, NOR, OR, While
related to Alternatives · 5
OR gate → Any, If, NAND, NOR, OR
is a · 1
OR gate → digital logic gate that implements logical disjunction
related to Analytical representation · 1
OR gate → OR
see also · 1
OR gate → AND

Important terminology Word statistics

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Important terminology

gate gates logic inputs nand cmos two logical outputs symbols also voltage one symbol states xor implementations many binary addition

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
OR gateis adigital logic gate that implements logical disjunction0.90text
OR gaterelated to AlternativesIf0.60section
OR gaterelated to AlternativesOR0.60section
OR gaterelated to AlternativesNAND0.60section
OR gaterelated to AlternativesNOR0.60section
OR gaterelated to AlternativesAny0.60section
OR gaterelated to Analytical representationOR0.60section
OR gaterelated to DescriptionAny OR0.60section
OR gaterelated to DescriptionIt0.60section
OR gaterelated to DescriptionThe0.60section
OR gaterelated to DescriptionIn0.60section
OR gaterelated to DescriptionThus0.60section

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    Min side: 3
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