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Interrupt coalescing

Interrupt coalescing, also known as interrupt moderation, is a technique in which events which would normally trigger a hardware interrupt are held back, either until a certain amount of work is pending, or a timeout timer triggers. Used correctly, this technique can reduce interrupt load by up to an order of magnitude, while only incurring relatively…

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Hardware interrupt Timeout FIFO queue Direct memory access UARTs

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Overview

Hardware interrupt
Timeout Timeout (computing)
FIFO queue FIFO (electronic)
Direct memory access
UARTs UART
16550 UART
IBM PC
Polling Polling (computer science)

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Interrupt coalescing

Nodes10

Edges9

Triples5

Avg. degree1.8

Density0.2

Components1

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Interrupt coalescing

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is a · 1

Interrupt coalescing → common feature of modern network cards

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Important terminology

interrupt coalescing technique hardware back also held either used data interrupts timer timeout uarts polling known moderation events would normally

Entity relationships Subject–Predicate–Object triples

Subject	Predicate	Object	Confidence	Src
Interrupt coalescing	is a	common feature of modern network cards	0.90	text
the 16550 UART chip used in the IBM PC's serial interface	instance of	but the technique dates back to early computer UARTs	0.80	text
at a time when even servicing the interrupt rates required by the low data rate serial data streams of the day was taxing for contemporary CPUs.Interrupt coalescing can also be implemented without support in hardware	instance of	but the technique dates back to early computer UARTs	0.80	text
by disabling interrupts in the interrupt controller	instance of	but the technique dates back to early computer UARTs	0.80	text
using timer-based polling	instance of	but the technique dates back to early computer UARTs	0.80	text

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