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P6 (microarchitecture)

The P6 microarchitecture is the sixth-generation Intel x86 microarchitecture, first implemented in the Pentium Pro microprocessor in 1995. It was partially succeeded by the NetBurst microarchitecture used by the Pentium 4 in 2000, though it continued to be used in new processors through the mid-2000s. The Core microarchitecture, an evolution of the…

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Features

20 related topics

P6 Variant Pentium M

9 related topics

Successor

6 related topics

P6 Variant Enhanced Pentium M

4 related topics

Key facts & relationships

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Cores
1
Extensions
MMX (Pentium II/III/M) SSE (Pentium III/M) SSE2 (Pentium M)
FSB speeds
66 MHz to 133 MHz
Instruction set
x86-16, IA-32
L1 cache
Pentium Pro: 16 KB (8 KB I cache + 8 KB D cache) Pentium II/III: 32 KB (16 KB I cache + 16 KB D cache)
L2 cache
128 KB to 512 KB 256 KB to 2048 KB (Xeon)

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Overview

Features

P6 Variant Pentium M

P6 Variant Enhanced Pentium M

Successor

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Map overview Semantic statistics

P6 (microarchitecture)

Nodes55
Edges54
Triples29
Avg. degree1.96
Density0.036364
Components1

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P6 (microarchitecture)

Top relations

Models · 7
P6 (microarchitecture) → Celeron II Series, Celeron III Series, Pentium II Series, Pentium II Xeon Series, Pentium III Series, Pentium III Xeon Series, Pentium Pro Series
Transistors · 7
P6 (microarchitecture) → 19M 250 nm (B0), 28M 180 nm (A1, A2, B0, C0, D0), 44M 130 nm (A1, B1, C1, D0), 5.5M 500 nm, 7.5M 250 nm (B0, B1), 7.5M 350 nm, 9.5M 250 nm (B0, C0)
Sockets · 4
P6 (microarchitecture) → Slot 1, Socket 370, Socket 479, Socket 8
Cores · 1
P6 (microarchitecture) → 1
Extensions · 1
P6 (microarchitecture) → MMX (Pentium II/III/M) SSE (Pentium III/M) SSE2 (Pentium M)
FSB speeds · 1
P6 (microarchitecture) → 66 MHz to 133 MHz
Instruction set · 1
P6 (microarchitecture) → x86-16, IA-32
L1 cache · 1
P6 (microarchitecture) → Pentium Pro: 16 KB (8 KB I cache + 8 KB D cache) Pentium II/III: 32 KB (16 KB I cache + 16 KB D cache)
L2 cache · 1
P6 (microarchitecture) → 128 KB to 512 KB 256 KB to 2048 KB (Xeon)
Launched · 1
P6 (microarchitecture) → November 1, 1995; 30 years ago (November 1, 1995)

Important terminology Word statistics

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Important terminology

pentium core p6 processors microarchitecture pro instructions intel fsb cache netburst x86 mobile support first new xeon celeron clock iii

Entity relationships Subject–Predicate–Object triples

SubjectPredicateObjectConfidenceSrc
P6 (microarchitecture)Cores11.00infobox
P6 (microarchitecture)ExtensionsMMX (Pentium II/III/M) SSE (Pentium III/M) SSE2 (Pentium M)1.00infobox
P6 (microarchitecture)FSB speeds66 MHz to 133 MHz1.00infobox
P6 (microarchitecture)Instruction setx86-16, IA-321.00infobox
P6 (microarchitecture)L1 cachePentium Pro: 16 KB (8 KB I cache + 8 KB D cache) Pentium II/III: 32 KB (16 KB I cache + 16 KB D cache)1.00infobox
P6 (microarchitecture)L2 cache128 KB to 512 KB 256 KB to 2048 KB (Xeon)1.00infobox
P6 (microarchitecture)LaunchedNovember 1, 1995; 30 years ago (November 1, 1995)1.00infobox
P6 (microarchitecture)Max. CPU clock rate150 MHz to 1.40 GHz1.00infobox
P6 (microarchitecture)MicroarchitectureP61.00infobox
P6 (microarchitecture)ModelsPentium Pro Series1.00infobox
P6 (microarchitecture)ModelsCeleron II Series1.00infobox
P6 (microarchitecture)ModelsPentium II Series1.00infobox
P6 (microarchitecture)ModelsPentium II Xeon Series1.00infobox
P6 (microarchitecture)ModelsCeleron III Series1.00infobox
P6 (microarchitecture)ModelsPentium III Series1.00infobox
P6 (microarchitecture)ModelsPentium III Xeon Series1.00infobox
P6 (microarchitecture)PredecessorP51.00infobox
P6 (microarchitecture)SocketsSocket 81.00infobox
P6 (microarchitecture)SocketsSlot 11.00infobox
P6 (microarchitecture)SocketsSocket 3701.00infobox
P6 (microarchitecture)SocketsSocket 4791.00infobox
P6 (microarchitecture)SuccessorNetBurst1.00infobox
P6 (microarchitecture)Transistors5.5M 500 nm1.00infobox
P6 (microarchitecture)Transistors7.5M 350 nm1.00infobox
P6 (microarchitecture)Transistors7.5M 250 nm (B0, B1)1.00infobox
P6 (microarchitecture)Transistors9.5M 250 nm (B0, C0)1.00infobox
P6 (microarchitecture)Transistors19M 250 nm (B0)1.00infobox
P6 (microarchitecture)Transistors28M 180 nm (A1, A2, B0, C0, D0)1.00infobox
P6 (microarchitecture)Transistors44M 130 nm (A1, B1, C1, D0)1.00infobox

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