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Double Data Rate 2 Synchronous Dynamic Random-Access Memory (DDR2 SDRAM) is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) interface. It is a JEDEC standard (JESD79-2); first published in September 2003. DDR2 succeeded the original DDR SDRAM specification, and was itself succeeded by DDR3 SDRAM in 2007. DDR2 DIMMs are neither…
History, Technology, Measurement & Standards
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ddr2 ddr sdram memory clock data bus latency modules jedec rate bandwidth dimms higher used chips rates two operating specification
| Subject | Predicate | Object | Confidence | Src |
|---|---|---|---|---|
| DDR2 SDRAM | Bandwidth | 3,200–8,533 MB/s | 1.00 | infobox |
| DDR2 SDRAM | Bus clock rate | 200–533 MHz | 1.00 | infobox |
| DDR2 SDRAM | Clock rate | 100–266 MHz | 1.00 | infobox |
| DDR2 SDRAM | Cycle time | 10–3.75 ns | 1.00 | infobox |
| DDR2 SDRAM | Developer | Samsung JEDEC | 1.00 | infobox |
| DDR2 SDRAM | Generation | 2nd generation | 1.00 | infobox |
| DDR2 SDRAM | Predecessor | DDR SDRAM (1998) | 1.00 | infobox |
| DDR2 SDRAM | Release date | September 2003; 22 years ago (2003-09) | 1.00 | infobox |
| DDR2 SDRAM | Standards | DDR2-400 (PC2-3200) | 1.00 | infobox |
| DDR2 SDRAM | Standards | DDR2-533 (PC2-4200) | 1.00 | infobox |
| DDR2 SDRAM | Standards | DDR2-667 (PC2-5300) | 1.00 | infobox |
| DDR2 SDRAM | Standards | DDR2-800 (PC2-6400) | 1.00 | infobox |
| DDR2 SDRAM | Standards | DDR2-1066 (PC2-8500) | 1.00 | infobox |
| DDR2 SDRAM | Successor | DDR3 SDRAM (2007) | 1.00 | infobox |
| DDR2 SDRAM | Transfer rate | 400–1066 MT/s | 1.00 | infobox |
| DDR2 SDRAM | Type | Synchronous dynamic random-access memory | 1.00 | infobox |
| DDR2 SDRAM | Voltage | 1.8 V | 1.00 | infobox |
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